1. Field of the invention
The present invention relates generally to data interface structures.
2. Description of the Related Art
As the data rate increases in data system devices (e.g., analog-to-digital converters), the reliable transfer of data becomes an increasingly important issue. Because this transfer includes the transfer of data out of one system device and into another system device, it is generally referred to as an input/output (I/O) interface problem. In response to this problem, a number of I/O interfaces have evolved.
An exemplary I/O interface is a low-voltage differential signaling (LVDS) structure in which a predetermined current from a current source is switched so that it passes differentially through a termination resistor. In a typical LVDS transmitter, first and second transistors are coupled in a push-pull arrangement to a current source and third and fourth transistors are also coupled in a push-pull arrangement to the current source (this arrangement of the first, second, third and fourth resistors is sometimes termed an H-bridge).
In response to one input data bit, the predetermined current passes in a first direction through the first transistor, the termination resistor and the fourth transistor. In response to a different input data bit, the predetermined current passes in an opposite second direction through the third transistor, the termination resistor and the second transistor.
The termination resistor is positioned in an LVDS receiver which can generally be separated by a significant distance from the LVDS transmitter. If the termination resistor is a 100 ohm resistor and the predetermined current is 3.5 milliamps, then the nominal differential output voltage is 350 millivolts. An advantage of the LVDS structure is that it can tolerate a fairly large ground potential difference between the transmitter and receiver.
Another exemplary I/O interface is a current-mode logic (CML) structure in which the CML transmitter includes a differential pair of transistors that differentially switch a tail current (e.g., 16 milliamps) across resistors (e.g., 50 ohm resistors. The CML receiver can be another differential pair having termination resistors coupled to their bases and delivering output signals through follower transistors (e.g., emitter followers or source followers).
A third exemplary I/O interface is a positive-referenced emitter-coupled (PECL) structure in which a PECL transmitter comprises a differential pair of transistors that differentially switch a tail current across resistors (e.g., 50 ohm resistors) which each provide an output signal through a respective one of a pair of emitter followers. Signal common-mode is referenced to a supply voltage Vcc. PECL receivers are generally differential pairs of transistors having termination resistors (e.g., 50 ohm resistors) coupled to their bases. PECL transmitters typically exhibit low output impedances which enhances driving capability but may generate mismatches that cause high-frequency aberrations.